the Sobel Edge detector using FPGA Project :: Hardware Target Specifications: Xilinx Spartan 3 XC3S400

Edge Detection in FPGA using Sobel Operator

Edge Detection in FPGA using Sobel Operator

Hardware Target Specifications: Xilinx Spartan 3 XC3S400

The target device we are using here is the Spartan3 XC3S400 Device (TQ144 Package) Speed -4

Summary of Spartan-3 FPGA Attributes

Device	System Gates	Equivalent Logic Cells	Rows	Columns	Total CLBs	Total Slices	Distributed RAM Bits	Block RAM Bits	Dedicated Multipliers	DCMs	Maximum User I/O	Maximum Differential I/O Paris
XC3S50	50K	1,728	16	12	192	768	12K	72K	4	2	124	56
XC3S200	200K	4,320	24	20	480	1,920	30K	216K	12	4	173	76
XC3S400	400K	8,064	32	28	896	3,584	56K	288K	16	4	264	116
XC3S1000	1000K	17,280	48	40	1,920	7,680	120K	432K	24	4	391	175
XC3S1500	1500K	29,952	64	52	3,328	13,312	208K	576K	32	4	487	221
XC3S2000	2000K	46,080	80	64	5,120	20,480	320K	720K	40	4	565	270
XC3S4000	4000K	62,208	96	72	6,912	27,648	432K	1,728K	96	4	633	300
XC3S5000	5000K	74,880	104	80	8,320	33,280	520K	1,872K	104	4	633	300

Tags: Xilinx , Spartan 3 , XC3S400 , FPGA ,

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