the Sobel Edge detector using FPGA Project

System Architecture

FPGA Sobel Edge Detection System Architectuer

The data received from the computer is stored in three 8X34 RAM memory. In order to exploit the parallel processing capability of the FPGA, 32 parallel Sobel operators are implemented on the FPGA. The output of the Sobel operators are multiplexed and transferred to the computer.

Tags: System , FPGA , Sobel , Architecture ,

Tag Cloud 74LS33 74LS641 Architecture BMP BMP Linux Canny Circuit DB25 Device Utilization Digital Image Processing Edge Detection FPGA Fedora GCC Image Manipulation Imtools JPEG Laplacian Linux Memory Modules Octal Transciever OpenGL PC Interface PNG Parallel Port Prewitt RAM Roberts Sobel Spartan 3 System Ubuntu VLSI Verilog XC3S400 Xilinx libjpeg libpng

intro

fpga implementation

pc interface logic

software implementation

imtools

codes

System Architecture