Edge Detection in FPGA using Sobel Operator
Edge Detection in FPGA using Sobel Operator

74LS641 Transciever Interface Circuit


Components
IC1 – 74LS641 IC2 – 74LS641 IC3 – 74LS33 C1 – DB25 connector R – 2.2K?
74LS641 is an octal transciever for converting 5 to 3.3v and back. 74LS33 is a 3.3 Voltage Regulator. DB25 is the parallel port male connector to attach to the Parallel Port. 2.2k Resistors are pull up resistors.

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